Following is the table listing the differences between the 2 microprocessors.
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Gb of physical memory supported b. Tb of virtual memory supported c. Gb of maximum segment size 8. Difference Between 8086 And 80386 Microprocessor Code Compatible WithObject code compatible with all 8086 family microprocessors 10. Data bus(D31 D0): It consist of 32 data pins, therefore memory is connected in 4 banks(bank 0 bank 3). Difference Between 8086 And 80386 Microprocessor 32 Bit Data InSo the 80386 can transfer 81632 bit data in one machine cycle. Address bus(A31 A2, BE3 BE0): With the help of address lines, it is able to address 4GB of physical memory space from 00000000H to FFFFFFFFH. GB is connected as 4 banks of 1GB each. Therefore to address 1GB of memory, 30 address lines are required i.e. A2-A31. BY UBAID SAUDAGAR 6 09-10-2012 Pin configuration cont. BY UBAID SAUDAGAR Lower two address pins A1 and A0 are internally decoded by 80386 to generate 4 bank enable signals(BE3 BE0) BE0 applies to D7 to D0 BE1 applies to D15 to D8 BE2 applies to D23 to D16 BE3 applies to D31 to D24 When any one of the BE pin goes low, data bytes are transferred to or from the microprocessor from the corresponding data lines When all are low then complete 32 bit data is transferred between microprocessor and memory in one7 machine cycle 09-10-2012 Pin configuration cont. BS16(bus size 16): If logic 01 is applied on BS16 pin, then it indicates the size of the external data bus is of 16 bits32 bits respectively, so the p has to use 1632 data pins correspondingly. If bus size is of 16 bits then 32 bit data will be transferred in two machine cycles. READY: If the ready input is 0, then p performs normal operation or normal machine cycle without any wait state. If the ready ip is 1,then the p will introduce wait state in machine cycle. PEREQ(Processor extension request): If the coprocessor is connected in the system, then the data transfer between the coprocessor and memory is performed by the main processor 80386. ![]() The physical address of memory location is generated by 80386. This address and readwrite control signals is transferred by 80386, but the data transfer is performed between coprocessor and memory. BY UBAID SAUDAGAR BUSY: If the instruction wait is given to the microprocessor, then the p will check the BUSY pin. If the BUSY input is 0, then the p will remain in the wait state. ![]() ERROR: When the coprocessor performs any operation and if error is obtained in the result, the coprocessor will give logic 0 on the ERROR pin of the p. The ISR of the INT16 is used to check the error flags of the coprocessor and display the message on the screen.10 09-10-2012 Pin configuration cont. HOLD AND HLDA: HOLD pin indicates that another bus master is requesting a local bus. HOLD signal is activated to inform the p that it wants the charge of the bus. When the p receives the HOLD request it will issue HLDA as an acknowledgement.
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